Formal Semantics and Proof Techniques for Optimizing VHDL Models
by Sheetanshu L. Pandey
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| Publisher: | Springer |
| Published In: | 30-Nov-1998 |
| ISBN-10: | 0792383753 |
| ISBN-13: | 9780792383758 |
| Binding Type: | Hardback |
| Weight: | 0.93 lbs |
| Pages: | pp. 184, 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss L |
The Title "Formal Semantics and Proof Techniques for Optimizing VHDL Models 1st Edition" is written by Sheetanshu L. Pandey. This book was published in the year 1999. The ISBN number 0792383753|9780792383758 is assigned to the Hardback version of this title. The book displayed here is a 1st Edition edition. This book has total of pp. 184 (Pages). The publisher of this title is Springer. We have about 150620 other great books from this publisher. Formal Semantics and Proof Techniques for Optimizing VHDL Models 1st Edition is currently Available with us.